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Design Engineer

Listed on: 4/2/2020 7:03:00 AMPST
Location: ,
Industry: Engineering
Salary: Open
Description: Need for an experienced physical design engineer using Cadence Design Suite. This engineer will assist in the development, implementation and testing of a digital neuromorphic accelerator chip. The selected candidate will work with other logic designers and system architects to implement ASIC physical design under the supervision of team lead. Task Description: Candidates are expected to create/modify/script Physical Design tool flows; as well as perform physical synthesis, scan insertion, MBIST insertion, and act as primary interface between logic and physical design for design for testability (DFT).
Requirements:  Required skills/Level of Experience: Position: *Senior Physical Design Engineer. Required Expertise: *Multiple successful tapeouts at lower-node technologies (using FinFETs at 14nm nodes and/or below) *· At least 4 years experience with Cadence tools (Genus, Modus) in the areas of physical design and DFT, including physical synthesis, scan insertion, MBIST insertion, LEC, Place and Route, Signoff *At least 3 years TCL and SHELL scripting *Experience with DFT implementation and integration *Experience in setting up/debugging/running DFT flow Ideal candidates will have additional expertise in all of the following areas: *Extensive experience with multiple Cadence EDA tools, tool administration, and flow automation; *Synthesis (including PLE) and formal equivalence checking; *RTL, gate-level and transistor-level simulations and debugging; Additional Preferred Skills: *3 years of Python scripting; . L. J. Gonzer Associates is an Equal Opportunity/Affirmative Action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability, or protected Veteran status.