Verification EngineerListed on: 6/22/2020 6:06:00 AMPST
Description: Need for an experienced verification engineer. This engineer will assist in the development, implementation and testing of a digital neuromorphic accelerator chip. The selected candidate will work directly with other designers and system architects to verify and debug pre-silicon logic under the supervision of team lead. Task Description: The candidate must be able to perform the following tasks at start date: *Collaborate with logic and verification team members in a dynamic environment *Create detailed test plans to verify complex digital blocks from functional specifications *Work closely with design engineers to identify coverage holes and deliver functionally correct blocks *Create coverage measures and identify corner cases *Create UVM-based test benches from scratch *Generate UVM-based test environments for logic designers *Create functional coverage in SystemVerilog *Setup, maintain, and operate batch regression environment *Simulate and debug SystemVerilog designs *Run formal verification tools *Document and support test plans reviews *Setup and maintain verification tools in linux
Requirements: Required skills/Level of Experience : *Experience with SystemVerilog with assertions, UVM test benches *Experience with C and C++ and scripting languages *Experience with linux environment *Familiarity with industry standard ASIC EDA tools, including logic simulators, and debuggers *Familiarity with formal verification and linters Nice to have skills: *At least 3 year experience in any of the following: SystemVerilog, UVM, SystemC, Verilog or VHDL *At least 1 year in C++/Python and Object Oriented Methodology *Experience with DFT *Experience with the simulation and verification of a system including 3rd party IP L. J. Gonzer Associates is an Equal Opportunity/Affirmative Action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability, or protected Veteran status.